FEMs - cont.
Self-tester to allow complete FEM testing in the absence of full crate of ROCs.
- FPGA implementation, schematics finished, simulated.
Address decoder (identical for FEM and all ROCs) uses geographical address to direct serial control and data traffic on digital backplane.
- CPLD implementation, simulated.
ORCAD schematics in progress.
Stealing (working!) schematics from PC for ARCnet, T&C and DCM links.