ROCs: Analog Processing Chain - Outputs
LVL1 trigger:
- 96-bit struck LST pattern.
- 6*BMCLK MUX (schematic from H. Skank) into optical G-link connection (1 per ROC on front panel).
DCM:
- Bit pattern from every beam crossing is strobed into 64-deep FIFO to cover LVL1 latency.
- Data from events from valid LVL1 is strobed into 5-event-deep FIFO.
- Data from 5-event FIFO on each ROC is sent to DCM event FIFO on FEM.