ASIC Alternatives for Discriminator and Delay
8 channel discriminators and delay could be implemented with Lecrory ICs (MDL08) and necessary support circuitry but serial control does not allow readback (allows 8 to 16 channels per ROC) ($25/chnl)
- Alternatives would use commercial comparator ICs and support circuitry for the discriminator; discrete DACs for threshold and FPGA for DAC control registers, channel enable/disable control and discriminator MUX output ($20/chnl)
Programmable delays would have to be implemented via Data Delay Devices or Elmac 8 channel delay units with shared serial control from FPGA implemented registers($43 & 25mW/Chnl)
delayed discriminator MUX could be implemented using FPGA
Would be approximately 40 -80mW/channel
ASIC can provide much lower per channel power, higher ROC channel density and lower per channel cost