Changes between 3.1 and 3.2

Changes marked with '*' are backward incompatible

# State Address PCIe Name Note Field Bits Type Description Value
1 Changed 0x0010 0,1 DMA_DESC_0a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
1 Into 0x0010 0,1 DMA_DESC_0a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
2 Changed 0x0030 0,1 DMA_DESC_1a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
2 Into 0x0030 0,1 DMA_DESC_1a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
3 Changed 0x0050 0,1 DMA_DESC_2a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
3 Into 0x0050 0,1 DMA_DESC_2a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
4 Changed 0x0060 0,1 CARD_TYPE 63..0 R Card Type:
- 709: VC709
- 710: HTG710
std_logic_vector(to_unsigned(CARD_TYPE,64))
4 Into 0x0060 0,1 CARD_TYPE 63..0 R Card Type:
- 709 (0x2c5): VC709
- 710 (0x2c6): HTG710
std_logic_vector(to_unsigned(CARD_TYPE,64))
5 Changed 0x0070 0,1 DMA_DESC_3a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
5 Into 0x0070 0,1 DMA_DESC_3a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
6 Changed 0x0090 0,1 DMA_DESC_4a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
6 Into 0x0090 0,1 DMA_DESC_4a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
7 Changed 0x00B0 0,1 DMA_DESC_5a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
7 Into 0x00B0 0,1 DMA_DESC_5a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
8* Changed 0x00C0 0,1 INCLUDE_EPROC16 0 R EPROC16 is included in Central Router None
8* Into 0x00C0 0,1 INCLUDE_EPROC16
Added FRHOEPROC2 7 R FromHost EPROC2 is included in Central Router None
Added FRHOEPROC4 6 R FromHost EPROC4 is included in Central Router None
Added FRHOEPROC8 5 R FromHost EPROC8 is included in Central Router None
Added FRHOEPROC16 4 R FromHost EPROC16 is included in Central Router None
Added TOHOEPROC2 3 R ToHost EPROC2 is included in Central Router None
Added TOHOEPROC4 2 R ToHost EPROC4 is included in Central Router None
Added TOHOEPROC8 1 R ToHost EPROC8 is included in Central Router None
Added TOHOEPROC16 0 R ToHost EPROC16 is included in Central Router None
9 Changed 0x00D0 0,1 DMA_DESC_6a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
9 Into 0x00D0 0,1 DMA_DESC_6a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
10 Changed 0x00F0 0,1 DMA_DESC_7a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Changed READ_WRITE 11 W Read/Write None
NUM_WORDS 10..0 W Number of 32 bit words None
10 Into 0x00F0 0,1 DMA_DESC_7a
RD_POINTER 127..64 W PC Read Pointer None
WRAP_AROUND 12 W Wrap around None
Into READ_WRITE 11 W 1: fromHost/ 0: toHost None
NUM_WORDS 10..0 W Number of 32 bit words None
11* Changed 0x0080 0,1 INT_TAB_ENABLE 7..0 R Interrupt Table enable
Selectively enable Interrupts
None
11* Into 0x0100 0,1 INT_TAB_ENABLE 7..0 W Interrupt Table enable
Selectively enable Interrupts
None
12 Added 0x0450 0,1 FROMHOST_FULL_THRESH
Added THRESHOLD_ASSERT 22..16 W Assert value of the FromHost programmable full flag None
Added THRESHOLD_NEGATE 6..0 W Negate value of the FromHost programmalbe full flag None
13 Added 0x0460 0,1 TOHOST_FULL_THRESH
Added THRESHOLD_ASSERT 27..16 W Assert value of the ToHost programmable full flag None
Added THRESHOLD_NEGATE 11..0 W Negate value of the ToHost programmalbe full flag None
14 Added 0x1020 0,1 FH_IC_PACKET_RDY 23..0 W Rising edge indicates the complete packet can be read None
15 Added 0x1030 0,1 TIMEOUT_CTRL
Added ENABLE 32 W 1 enables the timout trailer generation for ToHost mode None
Added TIMEOUT 31..0 W Number of 40 MHz clock cycles after which a timeout occurs. None
16 Added 0x2400 0,1 FH_IC_FIFO_00
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
17 Added 0x2410 0,1 TH_IC_FIFO_00
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
18 Added 0x2420 0,1 FH_IC_FIFO_01
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
19 Added 0x2430 0,1 TH_IC_FIFO_01
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
20 Added 0x2440 0,1 FH_IC_FIFO_02
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
21 Added 0x2450 0,1 TH_IC_FIFO_02
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
22 Added 0x2460 0,1 FH_IC_FIFO_03
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
23 Added 0x2470 0,1 TH_IC_FIFO_03
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
24 Added 0x2480 0,1 FH_IC_FIFO_04
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
25 Added 0x2490 0,1 TH_IC_FIFO_04
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
26 Added 0x24A0 0,1 FH_IC_FIFO_05
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
27 Added 0x24B0 0,1 TH_IC_FIFO_05
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
28 Added 0x24C0 0,1 FH_IC_FIFO_06
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
29 Added 0x24D0 0,1 TH_IC_FIFO_06
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
30 Added 0x24E0 0,1 FH_IC_FIFO_07
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
31 Added 0x24F0 0,1 TH_IC_FIFO_07
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
32 Added 0x2500 0,1 FH_IC_FIFO_08
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
33 Added 0x2510 0,1 TH_IC_FIFO_08
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
34 Added 0x2520 0,1 FH_IC_FIFO_09
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
35 Added 0x2530 0,1 TH_IC_FIFO_09
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
36 Added 0x2540 0,1 FH_IC_FIFO_10
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
37 Added 0x2550 0,1 TH_IC_FIFO_10
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
38 Added 0x2560 0,1 FH_IC_FIFO_11
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
39 Added 0x2570 0,1 TH_IC_FIFO_11
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
40 Added 0x2580 0,1 FH_IC_FIFO_12
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
41 Added 0x2590 0,1 TH_IC_FIFO_12
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
42 Added 0x25A0 0,1 FH_IC_FIFO_13
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
43 Added 0x25B0 0,1 TH_IC_FIFO_13
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
44 Added 0x25C0 0,1 FH_IC_FIFO_14
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
45 Added 0x25D0 0,1 TH_IC_FIFO_14
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
46 Added 0x25E0 0,1 FH_IC_FIFO_15
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
47 Added 0x25F0 0,1 TH_IC_FIFO_15
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
48 Added 0x2600 0,1 FH_IC_FIFO_16
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
49 Added 0x2610 0,1 TH_IC_FIFO_16
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
50 Added 0x2620 0,1 FH_IC_FIFO_17
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
51 Added 0x2630 0,1 TH_IC_FIFO_17
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
52 Added 0x2640 0,1 FH_IC_FIFO_18
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
53 Added 0x2650 0,1 TH_IC_FIFO_18
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
54 Added 0x2660 0,1 FH_IC_FIFO_19
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
55 Added 0x2670 0,1 TH_IC_FIFO_19
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
56 Added 0x2680 0,1 FH_IC_FIFO_20
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
57 Added 0x2690 0,1 TH_IC_FIFO_20
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
58 Added 0x26A0 0,1 FH_IC_FIFO_21
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
59 Added 0x26B0 0,1 TH_IC_FIFO_21
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
60 Added 0x26C0 0,1 FH_IC_FIFO_22
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
61 Added 0x26D0 0,1 TH_IC_FIFO_22
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
62 Added 0x26E0 0,1 FH_IC_FIFO_23
Added WE any T Any write to this register will trigger a write to the FIFO not register_map_monitor_s.register_map_cr_monitor.FH_IC_FIFO_{index:02}.FULL
Added FULL 8 R Full flag of the fifo, do not write if 1 None
Added DATAIN 7..0 W Data input of fifo None
63 Added 0x26F0 0,1 TH_IC_FIFO_23
Added RE any T Any write to this register will trigger a read enable from the fifo not register_map_monitor_s.register_map_cr_monitor.TH_IC_FIFO_{index:02}.EMPTY
Added EMPTY 8 R Empty flag of the fifo, do not read if 1 None
Added DATAOUT 7..0 R Data output of fifo None
64 Added 0x2700 0,1 EC_TOHOST_00
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
65 Added 0x2710 0,1 EC_FROMHOST_00
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
66 Added 0x2720 0,1 TTC_TOHOST_00 0 W Enables the ToHost Mini Egroup in TTC mode None
67 Added 0x2730 0,1 EC_TOHOST_01
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
68 Added 0x2740 0,1 EC_FROMHOST_01
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
69 Added 0x2750 0,1 TTC_TOHOST_01 0 W Enables the ToHost Mini Egroup in TTC mode None
70 Added 0x2760 0,1 EC_TOHOST_02
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
71 Added 0x2770 0,1 EC_FROMHOST_02
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
72 Added 0x2780 0,1 TTC_TOHOST_02 0 W Enables the ToHost Mini Egroup in TTC mode None
73 Added 0x2790 0,1 EC_TOHOST_03
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
74 Added 0x27A0 0,1 EC_FROMHOST_03
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
75 Added 0x27B0 0,1 TTC_TOHOST_03 0 W Enables the ToHost Mini Egroup in TTC mode None
76 Added 0x27C0 0,1 EC_TOHOST_04
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
77 Added 0x27D0 0,1 EC_FROMHOST_04
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
78 Added 0x27E0 0,1 TTC_TOHOST_04 0 W Enables the ToHost Mini Egroup in TTC mode None
79 Added 0x27F0 0,1 EC_TOHOST_05
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
80 Added 0x2800 0,1 EC_FROMHOST_05
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
81 Added 0x2810 0,1 TTC_TOHOST_05 0 W Enables the ToHost Mini Egroup in TTC mode None
82 Added 0x2820 0,1 EC_TOHOST_06
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
83 Added 0x2830 0,1 EC_FROMHOST_06
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
84 Added 0x2840 0,1 TTC_TOHOST_06 0 W Enables the ToHost Mini Egroup in TTC mode None
85 Added 0x2850 0,1 EC_TOHOST_07
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
86 Added 0x2860 0,1 EC_FROMHOST_07
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
87 Added 0x2870 0,1 TTC_TOHOST_07 0 W Enables the ToHost Mini Egroup in TTC mode None
88 Added 0x2880 0,1 EC_TOHOST_08
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
89 Added 0x2890 0,1 EC_FROMHOST_08
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
90 Added 0x28A0 0,1 TTC_TOHOST_08 0 W Enables the ToHost Mini Egroup in TTC mode None
91 Added 0x28B0 0,1 EC_TOHOST_09
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
92 Added 0x28C0 0,1 EC_FROMHOST_09
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
93 Added 0x28D0 0,1 TTC_TOHOST_09 0 W Enables the ToHost Mini Egroup in TTC mode None
94 Added 0x28E0 0,1 EC_TOHOST_10
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
95 Added 0x28F0 0,1 EC_FROMHOST_10
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
96 Added 0x2900 0,1 TTC_TOHOST_10 0 W Enables the ToHost Mini Egroup in TTC mode None
97 Added 0x2910 0,1 EC_TOHOST_11
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
98 Added 0x2920 0,1 EC_FROMHOST_11
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
99 Added 0x2930 0,1 TTC_TOHOST_11 0 W Enables the ToHost Mini Egroup in TTC mode None
100 Added 0x2940 0,1 EC_TOHOST_12
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
101 Added 0x2950 0,1 EC_FROMHOST_12
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
102 Added 0x2960 0,1 TTC_TOHOST_12 0 W Enables the ToHost Mini Egroup in TTC mode None
103 Added 0x2970 0,1 EC_TOHOST_13
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
104 Added 0x2980 0,1 EC_FROMHOST_13
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
105 Added 0x2990 0,1 TTC_TOHOST_13 0 W Enables the ToHost Mini Egroup in TTC mode None
106 Added 0x29A0 0,1 EC_TOHOST_14
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
107 Added 0x29B0 0,1 EC_FROMHOST_14
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
108 Added 0x29C0 0,1 TTC_TOHOST_14 0 W Enables the ToHost Mini Egroup in TTC mode None
109 Added 0x29D0 0,1 EC_TOHOST_15
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
110 Added 0x29E0 0,1 EC_FROMHOST_15
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
111 Added 0x29F0 0,1 TTC_TOHOST_15 0 W Enables the ToHost Mini Egroup in TTC mode None
112 Added 0x2A00 0,1 EC_TOHOST_16
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
113 Added 0x2A10 0,1 EC_FROMHOST_16
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
114 Added 0x2A20 0,1 TTC_TOHOST_16 0 W Enables the ToHost Mini Egroup in TTC mode None
115 Added 0x2A30 0,1 EC_TOHOST_17
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
116 Added 0x2A40 0,1 EC_FROMHOST_17
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
117 Added 0x2A50 0,1 TTC_TOHOST_17 0 W Enables the ToHost Mini Egroup in TTC mode None
118 Added 0x2A60 0,1 EC_TOHOST_18
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
119 Added 0x2A70 0,1 EC_FROMHOST_18
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
120 Added 0x2A80 0,1 TTC_TOHOST_18 0 W Enables the ToHost Mini Egroup in TTC mode None
121 Added 0x2A90 0,1 EC_TOHOST_19
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
122 Added 0x2AA0 0,1 EC_FROMHOST_19
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
123 Added 0x2AB0 0,1 TTC_TOHOST_19 0 W Enables the ToHost Mini Egroup in TTC mode None
124 Added 0x2AC0 0,1 EC_TOHOST_20
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
125 Added 0x2AD0 0,1 EC_FROMHOST_20
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
126 Added 0x2AE0 0,1 TTC_TOHOST_20 0 W Enables the ToHost Mini Egroup in TTC mode None
127 Added 0x2AF0 0,1 EC_TOHOST_21
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
128 Added 0x2B00 0,1 EC_FROMHOST_21
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
129 Added 0x2B10 0,1 TTC_TOHOST_21 0 W Enables the ToHost Mini Egroup in TTC mode None
130 Added 0x2B20 0,1 EC_TOHOST_22
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
131 Added 0x2B30 0,1 EC_FROMHOST_22
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
132 Added 0x2B40 0,1 TTC_TOHOST_22 0 W Enables the ToHost Mini Egroup in TTC mode None
133 Added 0x2B50 0,1 EC_TOHOST_23
Added ENCODING 2..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Enables the EC channel None
134 Added 0x2B60 0,1 EC_FROMHOST_23
Added ENCODING 4..1 W Configures encoding of the EC channel None
Added ENABLE 0 W Configures the FromHost Mini egroup in EC mode None
135 Added 0x2B70 0,1 TTC_TOHOST_23 0 W Enables the ToHost Mini Egroup in TTC mode None
136 Added 0x2B80 0,1 TTC_DELAY_00 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
137 Added 0x2B90 0,1 TTC_DELAY_01 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
138 Added 0x2BA0 0,1 TTC_DELAY_02 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
139 Added 0x2BB0 0,1 TTC_DELAY_03 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
140 Added 0x2BC0 0,1 TTC_DELAY_04 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
141 Added 0x2BD0 0,1 TTC_DELAY_05 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
142 Added 0x2BE0 0,1 TTC_DELAY_06 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
143 Added 0x2BF0 0,1 TTC_DELAY_07 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
144 Added 0x2C00 0,1 TTC_DELAY_08 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
145 Added 0x2C10 0,1 TTC_DELAY_09 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
146 Added 0x2C20 0,1 TTC_DELAY_10 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
147 Added 0x2C30 0,1 TTC_DELAY_11 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
148 Added 0x2C40 0,1 TTC_DELAY_12 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
149 Added 0x2C50 0,1 TTC_DELAY_13 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
150 Added 0x2C60 0,1 TTC_DELAY_14 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
151 Added 0x2C70 0,1 TTC_DELAY_15 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
152 Added 0x2C80 0,1 TTC_DELAY_16 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
153 Added 0x2C90 0,1 TTC_DELAY_17 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
154 Added 0x2CA0 0,1 TTC_DELAY_18 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
155 Added 0x2CB0 0,1 TTC_DELAY_19 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
156 Added 0x2CC0 0,1 TTC_DELAY_20 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
157 Added 0x2CD0 0,1 TTC_DELAY_21 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
158 Added 0x2CE0 0,1 TTC_DELAY_22 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
159 Added 0x2CF0 0,1 TTC_DELAY_23 3..0 W Configures the FromHost TTC pipeline in the fanout selector None
160 Added 0x2D00 0,1 TTC_BUSY_TIMING_CTRL
Added PRESCALE 51..32 W Prescales the 40MHz clock to create an internal slow clock None
Added BUSY_WIDTH 31..16 W Minimum number of 40MHz clocks that the busy is asserted None
Added LIMIT_TIME 15..0 W Number of prescaled clocks a given busy must be asserted before it is recognized None
161 Added 0x3300 0,1 CR_STATIC_CONFIGURATION 0 R Central Router Monitors None
162 Added 0x3310 0,1 CR_DEFAULT_EPROC_ENA0 14..0 R Central Router Monitors None
163 Added 0x3320 0,1 CR_DEFAULT_EPROC_ENA1 14..0 R Central Router Monitors None
164 Added 0x3330 0,1 CR_DEFAULT_EPROC_ENA2 14..0 R Central Router Monitors None
165 Added 0x3340 0,1 CR_DEFAULT_EPROC_ENA3 14..0 R Central Router Monitors None
166 Added 0x3350 0,1 CR_DEFAULT_EPROC_ENA4 14..0 R Central Router Monitors None
167 Added 0x3360 0,1 CR_DEFAULT_EPROC_ENA5 14..0 R Central Router Monitors None
168 Added 0x3370 0,1 CR_DEFAULT_EPROC_ENA6 14..0 R Central Router Monitors None
169 Added 0x3380 0,1 CR_DEFAULT_EPROC_ENA7 14..0 R Central Router Monitors None
170 Added 0x3390 0,1 CR_DEFAULT_EPROC_ENCODING0 14..0 R Central Router Monitors None
171 Added 0x33A0 0,1 CR_DEFAULT_EPROC_ENCODING1 14..0 R Central Router Monitors None
172 Added 0x33B0 0,1 CR_DEFAULT_EPROC_ENCODING2 14..0 R Central Router Monitors None
173 Added 0x33C0 0,1 CR_DEFAULT_EPROC_ENCODING3 14..0 R Central Router Monitors None
174 Added 0x33D0 0,1 CR_DEFAULT_EPROC_ENCODING4 14..0 R Central Router Monitors None
175 Added 0x33E0 0,1 CR_DEFAULT_EPROC_ENCODING5 14..0 R Central Router Monitors None
176 Added 0x33F0 0,1 CR_DEFAULT_EPROC_ENCODING6 14..0 R Central Router Monitors None
177 Added 0x3400 0,1 CR_DEFAULT_EPROC_ENCODING7 14..0 R Central Router Monitors None
178 Added 0x55C0 0 GBT_TC_EDGE
Added B2312 27..16 W Sampling edge selection for TX domain crossing [23:12] None
Added B1100 11..0 W Sampling edge selection for TX domain crossing [11:0] None
179 Added 0x7220 0 HK_CTRL_FMC
Added SI5345_INSEL 6..5 W Selects the input clock source
0 : FPGA (FMC LA01)
1 : FMC OSC (40.079 MHz)
2 : FPGA (FMC LA18)
None
Added SI5345_A 4..3 W Si5345 I2C address select 2 LSB (0x0:default, dev id 0x68) None
Added SI5345_OE 2 W Si5345 active low output enable (0:enable) None
Added SI5345_RSTN 1 W Si5345 active low output enable (0:reset) None
Added SI5345_SEL 0 W Si5345 programming mode
1 : I2C mode (default)
0 : SPI mode
None
180 Changed 0x7300 0 MMCM_MAIN
AUTOMATIC_CLOCK_SWITCH_ENABLED 2 R 1 when the automatic clock switch is enabled in the design None
OSC_SEL 1 R Main MMCM Oscillator Select
1: TTC clock
0: Local clock
None
PLL_LOCK 0 R Main MMCM PLL Lock Status None
180 Into 0x7300 0 MMCM_MAIN
Added LCLK_FORCE 3 W force the use of the Local Clock in any circumstance, overrule automatic clock switch None
AUTOMATIC_CLOCK_SWITCH_ENABLED 2 R 1 when the automatic clock switch is enabled in the design None
OSC_SEL 1 R Main MMCM Oscillator Select
1: TTC clock
0: Local clock
None
PLL_LOCK 0 R Main MMCM PLL Lock Status None
181 Added 0x7450 0 FPGA_CORE_TEMP 11..0 R XADC temperature monitor for the FPGA CORE
for FLX709, FLX710
temp (C)= ((FPGA_CORE_TEMP* 503.975)/4096)-273.15
for FLX711
temp (C)= ((FPGA_CORE_TEMP* 502.9098)/4096)-273.8195
None
182 Added 0x7460 0 FPGA_CORE_VCCINT 11..0 R XADC voltage measurement VCCINT = (FPGA_CORE_VCCINT *3.0)/4096 None
183 Added 0x7470 0 FPGA_CORE_VCCAUX 11..0 R XADC voltage measurement VCCAUX = (FPGA_CORE_VCCAUX *3.0)/4096 None
184 Added 0x7480 0 FPGA_CORE_VCCBRAM 11..0 R XADC voltage measurement VCCBRAM = (FPGA_CORE_VCCBRAM *3.0)/4096 None
185 Added 0x7490 0 LMK_LOCKED 0 R LMK Chip on BNL711 locked None
186 Added 0x74A0 0 FPGA_DNA 63..0 R Unique identifier of the FPGA None