Changes between 2.1 and 3.0

Changes marked with '*' are backward incompatible

# State Address Name Note Field Bits Type Description Value
1 Added 0x0000 REG_MAP_VERSION 15..0 R Register Map Version, 3.0 formatted as 0x0300 REG_MAP_VERSION
2* Changed 0x0000 BOARD_ID_TIMESTAMP 39..0 R Board ID Date / Time in BCD format YYMMDDhhmm BUILD_DATETIME
2* Into 0x0010 BOARD_ID_TIMESTAMP 39..0 R Board ID Date / Time in BCD format YYMMDDhhmm BUILD_DATETIME
3* Changed 0x0008 BOARD_ID_SVN 15..0 R Board ID SVN Revision std_logic_vector(to_unsigned(SVN_VERSION,16))
3* Into 0x0020 BOARD_ID_SVN 15..0 R Board ID SVN Revision std_logic_vector(to_unsigned(SVN_VERSION,16))
4* Changed 0x0010 STATUS_LEDS 7..0 W Board GPIO Leds None
4* Into 0x0030 STATUS_LEDS 7..0 W Board GPIO Leds None
5* Changed 0x0020 GENERIC_CONSTANTS
INTERRUPTS 15..8 R Number of Interrupts std_logic_vector(to_unsigned(NUMBER_OF_INTERRUPTS,8))
DESCRIPTORS 7..0 R Number of Descriptors std_logic_vector(to_unsigned(NUMBER_OF_DESCRIPTORS,8))
5* Into 0x0040 GENERIC_CONSTANTS
INTERRUPTS 15..8 R Number of Interrupts std_logic_vector(to_unsigned(NUMBER_OF_INTERRUPTS,8))
DESCRIPTORS 7..0 R Number of Descriptors std_logic_vector(to_unsigned(NUMBER_OF_DESCRIPTORS,8))
6* Changed 0x0030 NUM_OF_CHANNELS 7..0 R Number of GBT Channels std_logic_vector(to_unsigned(GBT_NUM,8))
6* Into 0x0050 NUM_OF_CHANNELS 7..0 R Number of GBT Channels std_logic_vector(to_unsigned(GBT_NUM,8))
7* Changed 0x0040 CARD_TYPE 63..0 R Card Type:
- 709: VC709
- 710: HTG710
std_logic_vector(to_unsigned(CARD_TYPE,64))
7* Into 0x0060 CARD_TYPE 63..0 R Card Type:
- 709: VC709
- 710: HTG710
std_logic_vector(to_unsigned(CARD_TYPE,64))
8* Changed 0x0050 GBT_MAPPING 7..0 R CXP-to-GBT mapping:
0: NORMAL CXP1 1-12 CXP2 13-24
1: ALTERNATE CXP1 1-4,9-12,17-20
std_logic_vector(to_unsigned(GBT_MAPPING,8))
8* Into 0x0070 GBT_MAPPING 7..0 R CXP-to-GBT mapping:
0: NORMAL CXP1 1-12 CXP2 13-24
1: ALTERNATE CXP1 1-4,9-12,17-20
std_logic_vector(to_unsigned(GBT_MAPPING,8))
9 Added 0x0440 REGISTER_RESET any T Resets the register map to default values. Any write triggers this reset. None
10* Changed 0x2300 CR_TH_UPDATE_CTRL any T See Central Router Doc 1
10* Into 0x1000 CR_TH_UPDATE_CTRL any T See Central Router Doc 1
11* Changed 0x2310 CR_FH_UPDATE_CTRL any T See Central Router Doc 1
11* Into 0x1010 CR_FH_UPDATE_CTRL any T See Central Router Doc 1
12* Changed 0x4000 GBT_EMU_ENA
Changed TOHOST 1 W Enable GBT dummy emulator ToHost None
Changed TOFRONTEND 0 W Enable GBT dummy emulator ToFrontEnd None
12* Into 0x4000 GBT_EMU_ENA
Into TOFRONTEND 1 W Enable GBT dummy emulator ToFrontEnd None
Into TOHOST 0 W Enable GBT dummy emulator ToHost None
13* Changed 0x4018 GBT_EMU_CONFIG_WE_ARRAY 6..0 W write enable array, every bit is one emulator RAM block None
13* Into 0x4010 GBT_EMU_CONFIG_WE_ARRAY 6..0 W write enable array, every bit is one emulator RAM block None
14* Changed 0x4010 GBT_EMU_CONFIG
WRADDR 45..32 W write address bus None
WRDATA 15..0 W write data bus None
14* Into 0x4020 GBT_EMU_CONFIG
WRADDR 45..32 W write address bus None
WRDATA 15..0 W write data bus None
15* Changed 0x5480 GBT_RXSLIDE
Removed BF1 59..48 W RxSlide select [23:12] None
Removed BF2 43..32 W RxSlide select [11:0] None
Removed BF3 27..16 W RxSlide manual [23:12 None
Removed BF4 11..0 W RxSlide manual [11:0] None
15* Into 0x5480 GBT_RXSLIDE
Added S2312 59..48 W RxSlide select [23:12] None
Added S1100 43..32 W RxSlide select [11:0] None
Added M2312 27..16 W RxSlide manual [23:12] None
Added M1100 11..0 W RxSlide manual [11:0] None
16* Changed 0x5490 GBT_TXUSRRDY
Removed BF1 27..16 W TxUsrRdy [23:12] None
Removed BF2 11..0 W TxUsrRdy [11:0] None
16* Into 0x5490 GBT_TXUSRRDY
Added B2312 27..16 W TxUsrRdy [23:12] None
Added B1100 11..0 W TxUsrRdy [11:0] None
17* Changed 0x54A0 GBT_RXUSRRDY
Removed BF1 27..16 W RxUsrRdy [23:12] None
Removed BF2 11..0 W RxUsrRdy [11:0] None
17* Into 0x54A0 GBT_RXUSRRDY
Added B2312 27..16 W RxUsrRdy [23:12] None
Added B1100 11..0 W RxUsrRdy [11:0] None
18* Changed 0x54B0 GBT_GTTX_RESET
Removed BF1 30..28 W SOFT_RESET [5:3] None
Removed BF2 27..16 W GTTX_RESET [23:12] None
Removed BF3 14..12 W SOFT_RESET [2:0] None
Removed BF4 11..0 W GTTX_RESET [11:0] None
18* Into 0x54B0 GBT_GTTX_RESET
Added B0503 30..28 W SOFT_RESET [5:3] None
Added B2312 27..16 W GTTX_RESET [23:12] None
Added B0200 14..12 W SOFT_RESET [2:0] None
Added B1100 11..0 W GTTX_RESET [11:0] None
19* Changed 0x54C0 GBT_GTRX_RESET
Removed BF1 27..16 W GTRX_RESET [23:0] None
Removed BF2 11..0 W GTRX_RESET [11:0] None
19* Into 0x54C0 GBT_GTRX_RESET
Added B2312 27..16 W GTRX_RESET [23:12] None
Added B1100 11..0 W GTRX_RESET [11:0] None
20* Changed 0x54D0 GBT_PLL_RESET
Removed BF1 30..28 W QPLL_RESET [5:3] None
Removed BF2 27..16 W CPLL_RESET [23:12] None
Removed BF3 14..12 W QPLL_RESET [2:0] None
Removed BF4 11..0 W CPLL_RESET [11:0] None
20* Into 0x54D0 GBT_PLL_RESET
Added B0503 30..28 W QPLL_RESET [5:3] None
Added B2312 27..16 W CPLL_RESET [23:12] None
Added B0200 14..12 W QPLL_RESET [2:0] None
Added B1100 11..0 W CPLL_RESET [11:0] None
21* Changed 0x54E0 GBT_SOFT_TX_RESET
Removed BF1 30..28 W SOFT_TX_RESET_ALL [5:3] None
Removed BF2 27..16 W SOFT_TX_RESET_GT [23:12] None
Removed BF3 14..12 W SOFT_TX_RESET_ALL [2:0] None
Removed BF4 11..0 W SOFT_TX_RESET_GT [11:0] None
21* Into 0x54E0 GBT_SOFT_TX_RESET
Added B0503 30..28 W SOFT_TX_RESET_ALL [5:3] None
Added B2312 27..16 W SOFT_TX_RESET_GT [23:12] None
Added B0200 14..12 W SOFT_TX_RESET_ALL [2:0] None
Added B1100 11..0 W SOFT_TX_RESET_GT [11:0] None
22* Changed 0x54F0 GBT_SOFT_RX_RESET
Removed BF1 30..28 W SOFT_RX_RESET_ALL [5:3] None
Removed BF2 27..16 W SOFT_RX_RESET_GT [23:12] None
Removed BF3 14..12 W SOFT_RX_RESET_ALL [2:0] None
Removed BF4 11..0 W SOFT_RX_RESET_GT [11:0] None
22* Into 0x54F0 GBT_SOFT_RX_RESET
Added B0503 30..28 W SOFT_RX_RESET_ALL [5:3] None
Added B2312 27..16 W SOFT_RX_RESET_GT [23:12] None
Added B0200 14..12 W SOFT_RX_RESET_ALL [2:0] None
Added B1100 11..0 W SOFT_RX_RESET_GT [11:0] None
23* Changed 0x5500 GBT_ODD_EVEN
Removed BF1 27..16 W OddEven [23:12] None
Removed BF2 11..0 W OddEven [11:0] None
23* Into 0x5500 GBT_ODD_EVEN
Added B2312 27..16 W OddEven [23:12] None
Added B1100 11..0 W OddEven [11:0] None
24* Changed 0x5510 GBT_TOPBOT
Removed BF1 27..16 W TopBot [23:12] None
Removed BF2 11..0 W TopBot [11:0] None
24* Into 0x5510 GBT_TOPBOT
Added B2312 27..16 W TopBot [23:12] None
Added B1100 11..0 W TopBot [11:0] None
25* Changed 0x5560 GBT_DATA_TXFORMAT
Removed BF1 55..32 W DATA_TXFORMAT [47:24] None
Removed BF2 23..0 W DATA_TXFORMAT [23:0] None
25* Into 0x5560 GBT_DATA_TXFORMAT
Added B4724 55..32 W DATA_TXFORMAT [47:24] None
Added B2300 23..0 W DATA_TXFORMAT [23:0] None
26* Changed 0x5570 GBT_DATA_RXFORMAT
Removed BF1 55..32 W DATA_RXFORMAT [47:24] None
Removed BF2 23..0 W DATA_RXFORMAT [23:0] None
26* Into 0x5570 GBT_DATA_RXFORMAT
Added B4724 55..32 W DATA_RXFORMAT [47:24] None
Added B2300 23..0 W DATA_RXFORMAT [23:0] None
27* Changed 0x5580 GBT_TX_RESET
Removed BF1 27..16 W TX Logic reset [23:12] None
Removed BF2 11..0 W TX Logic reset [11:0] None
27* Into 0x5580 GBT_TX_RESET
Added B2312 27..16 W TX Logic reset [23:12] None
Added B1100 11..0 W TX Logic reset [11:0] None
28* Changed 0x5590 GBT_RX_RESET
Removed BF1 27..16 W RX Logic reset [23:12] None
Removed BF2 11..0 W RX Logic reset [11:0] None
28* Into 0x5590 GBT_RX_RESET
Added B2312 27..16 W RX Logic reset [23:12] None
Added B1100 11..0 W RX Logic reset [11:0] None
29* Changed 0x55A0 GBT_TX_TC_METHOD
Removed BF1 27..16 W TX time domain crossing method [23:12] None
Removed BF2 11..0 W TX time domain crossing method [11:0] None
29* Into 0x55A0 GBT_TX_TC_METHOD
Added B2312 27..16 W TX time domain crossing method [23:12] None
Added B1100 11..0 W TX time domain crossing method [11:0] None
30* Changed 0x55B0 GBT_OUTMUX_SEL
Removed BF1 27..16 W Descrambler output MUX selection [23:12] None
Removed BF2 11..0 W Descrambler output MUX selection [11:0] None
30* Into 0x55B0 GBT_OUTMUX_SEL
Added B2312 27..16 W Descrambler output MUX selection [23:12] None
Added B1100 11..0 W Descrambler output MUX selection [11:0] None
31* Changed 0x6600 GBT_VERSION
Removed DATA 63..48 R Data None
GBT_VERSION 47..32 R GBT Version None
GTH_IP_VERSION 31..16 R GTH IP Version None
RESERVED 15..3 R Reserved None
GTHREFCLK_SEL 2 R GTHREFCLK SEL None
RX_CLK_SEL 1 R RX CLK SEL None
PLL_SEL 0 R PLL SEL None
31* Into 0x6600 GBT_VERSION
Added DATE 63..48 R Date None
GBT_VERSION 47..32 R GBT Version None
GTH_IP_VERSION 31..16 R GTH IP Version None
RESERVED 15..3 R Reserved None
GTHREFCLK_SEL 2 R GTHREFCLK SEL None
RX_CLK_SEL 1 R RX CLK SEL None
PLL_SEL 0 R PLL SEL None
32* Changed 0x6680 GBT_TXRESET_DONE
Removed BF1 27..16 R TX Reset done [23:12] None
Removed BF2 11..0 R TX Reset done [11:0] None
32* Into 0x6680 GBT_TXRESET_DONE
Added B2312 27..16 R TX Reset done [23:12] None
Added B1100 11..0 R TX Reset done [11:0] None
33* Changed 0x6690 GBT_RXRESET_DONE
Removed BF1 27..16 R RX Reset done [23:12] None
Removed BF2 11..0 R RX Reset done [11:0] None
33* Into 0x6690 GBT_RXRESET_DONE
Added B2312 27..16 R RX Reset done [23:12] None
Added B1100 11..0 R RX Reset done [11:0] None
34* Changed 0x66A0 GBT_TXFSMRESET_DONE
Removed BF1 27..16 R TX FSM Reset done [23:12] None
Removed BF2 11..0 R TX FSM Reset done [11:0] None
34* Into 0x66A0 GBT_TXFSMRESET_DONE
Added B2312 27..16 R TX FSM Reset done [23:12] None
Added B1100 11..0 R TX FSM Reset done [11:0] None
35* Changed 0x66B0 GBT_RXFSMRESET_DONE
Removed BF1 27..16 R RX FSM Reset done [23:12] None
Removed BF2 11..0 R RX FSM Reset done [11:0] None
35* Into 0x66B0 GBT_RXFSMRESET_DONE
Added B2312 27..16 R RX FSM Reset done [23:12] None
Added B1100 11..0 R RX FSM Reset done [11:0] None
36* Changed 0x66C0 GBT_CPLL_FBCLK_LOST
Removed BF1 27..16 R CPLL FBCLK LOST [23:12] None
Removed BF2 11..0 R CPLL FBCLK LOST [11:0] None
36* Into 0x66C0 GBT_CPLL_FBCLK_LOST
Added B2312 27..16 R CPLL FBCLK LOST [23:12] None
Added B1100 11..0 R CPLL FBCLK LOST [11:0] None
37* Changed 0x66D0 GBT_CPLL_LOCK
Removed BF1 30..28 R QPLL LOCK [5:3] None
Removed BF2 27..16 R CPLL LOCK [23:12] None
Removed BF3 14..12 R QPLL LOCK [2:0] None
Removed BF4 11..0 R CPLL LOCK [11:0] None
37* Into 0x66D0 GBT_CPLL_LOCK
Added B0503 30..28 R QPLL LOCK [5:3] None
Added B2312 27..16 R CPLL LOCK [23:12] None
Added B0200 14..12 R QPLL LOCK [2:0] None
Added B1100 11..0 R CPLL LOCK [11:0] None
38* Changed 0x66E0 GBT_RXCDR_LOCK
Removed BF1 27..16 R RX CDR LOCK [23:12] None
Removed BF2 11..0 R RX CDR LOCK [11:0] None
38* Into 0x66E0 GBT_RXCDR_LOCK
Added B2312 27..16 R RX CDR LOCK [23:12] None
Added B1100 11..0 R RX CDR LOCK [11:0] None
39* Changed 0x66F0 GBT_CLK_SAMPLED
Removed BF1 27..16 R clk sampled [23:12] None
Removed BF2 11..0 R clk sampled [11:0] None
39* Into 0x66F0 GBT_CLK_SAMPLED
Added B2312 27..16 R clk sampled [23:12] None
Added B1100 11..0 R clk sampled [11:0] None
40* Changed 0x6700 GBT_RX_IS_HEADER
Removed BF1 27..16 R RX IS HEADER [23:12] None
Removed BF2 11..0 R RX IS HEADER [11:0] None
40* Into 0x6700 GBT_RX_IS_HEADER
Added B2312 27..16 R RX IS HEADER [23:12] None
Added B1100 11..0 R RX IS HEADER [11:0] None
41* Changed 0x6710 GBT_RX_IS_DATA
Removed BF1 27..16 R RX IS DATA [23:12] None
Removed BF2 11..0 R RX IS DATA [11:0] None
41* Into 0x6710 GBT_RX_IS_DATA
Added B2312 27..16 R RX IS DATA [23:12] None
Added B1100 11..0 R RX IS DATA [11:0] None
42* Changed 0x6720 GBT_RX_HEADER_FOUND
Removed BF1 27..16 R RX HEADER FOUND [23:12] None
Removed BF2 11..0 R RX HEADER FOUND [11:0] None
42* Into 0x6720 GBT_RX_HEADER_FOUND
Added B2312 27..16 R RX HEADER FOUND [23:12] None
Added B1100 11..0 R RX HEADER FOUND [11:0] None
43* Changed 0x6730 GBT_ALIGNMENT_DONE
Removed BF1 27..16 R RX ALIGNMENT DONE [23:12] None
Removed BF2 11..0 R RX ALIGNMENT DONE [11:0] None
43* Into 0x6730 GBT_ALIGNMENT_DONE
Added B2312 27..16 R RX ALIGNMENT DONE [23:12] None
Added B1100 11..0 R RX ALIGNMENT DONE [11:0] None
44* Changed 0x6740 GBT_OUT_MUX_STATUS
Removed BF1 27..16 R GBT output mux status [23:12] None
Removed BF2 11..0 R GBT output mux status [11:0] None
44* Into 0x6740 GBT_OUT_MUX_STATUS
Added B2312 27..16 R GBT output mux status [23:12] None
Added B1100 11..0 R GBT output mux status [11:0] None
45* Changed 0x6750 GBT_ERROR
Removed BF1 27..16 R Error flags [23:12] None
Removed BF2 11..0 R Error flags [11:0] None
45* Into 0x6750 GBT_ERROR
Added B2312 27..16 R Error flags [23:12] None
Added B1100 11..0 R Error flags [11:0] None
46* Changed 0x6760 GBT_GBT_TOPBOT_C
Removed BF1 27..16 R TopBot_c [23:12] None
Removed BF2 11..0 R TopBot_c [11:0] None
46* Into 0x6760 GBT_GBT_TOPBOT_C
Added B2312 27..16 R TopBot_c [23:12] None
Added B1100 11..0 R TopBot_c [11:0] None
47* Changed 0x7208 HK_CTRL_CDCE
REF_SEL 2 W REF_SEL None
PD 1 W PD None
SYNC 0 W SYNC None
47* Into 0x7200 HK_CTRL_CDCE
REF_SEL 2 W REF_SEL None
PD 1 W PD None
SYNC 0 W SYNC None
48* Changed 0x7200 HK_CTRL_I2C
CONFIG_TRIG 1 W i2c_config_trig None
CLKFREQ_SEL 0 W i2c_clkfreq_sel None
48* Into 0x7210 HK_CTRL_I2C
CONFIG_TRIG 1 W i2c_config_trig None
CLKFREQ_SEL 0 W i2c_clkfreq_sel None
49* Removed 0x7300 PLL_LOCK 1..0 R Main MMCM PLL Lock Status None
50 Added 0x7300 MMCM_MAIN
Added OSC_SEL 1 R Main MMCM Oscillator Select None
Added PLL_LOCK 0 R Main MMCM PLL Lock Status None
51 Added 0x7440 TTC_EMU
Added SEL 1 W Select TTC data source 1 TTC Emu | 0 TTC Decoder None
Added ENA 0 W Enable TTC data generator (10 bit counter) None
52* Changed 0x7508 DEBUG_PORT_CLK 3..0 W Debug clock and L1A port on SMA HTGx#4 None
52* Into 0x7510 DEBUG_PORT_CLK 3..0 W Debug clock and L1A port on SMA HTGx#4 None