{ Packager-XL run on 18-May-2017 AT 17:17:57.00 }

BINDING CHANGES LIST

DELETED BINDINGS:


CHANGED BINDINGS:

@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I1@CNCONNECTOR.CON38AB(CHIPS) CON38AB-UEC5-019-1-H-D-RA-1-A (0) IS ASSIGNED TO J1 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I2@CNCONNECTOR.CON38AB(CHIPS) CON38AB-UEC5-019-1-H-D-RA-1-A (0) IS ASSIGNED TO J2 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I3@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C1 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I4@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C2 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I5@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C3 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I6@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C4 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I7@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C5 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I8@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C6 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I9@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C7 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I10@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C8 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I11@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C9 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I12@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C10 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I16@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C20 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I17@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C19 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I18@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C18 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I19@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C17 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I20@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C16 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I21@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C15 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I22@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C14 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I24@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C13 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I25@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C12 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I26@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0) IS ASSIGNED TO C11 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I35@CNPASSIVE.PT100(CHIPS) PT100-P0K1.1206.2P.B (0) IS ASSIGNED TO R2 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I44@CNPASSIVE.PT100(CHIPS) PT100-P0K1.1206.2P.B (0) IS ASSIGNED TO R1 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I45@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1206-220UF,6.3V (0) IS ASSIGNED TO C21 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I46@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1206-220UF,6.3V (0) IS ASSIGNED TO C22 SECTION 1
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I48@CNPASSIVE.TP(CHIPS) TP_SMD-2X2MM (0) IS ASSIGNED TO TP1 SECTION 1

END BINDING CHANGES LIST


LOGICAL CHANGES LIST

LOGICAL PARTS DELETED FROM DESIGN:


LOGICAL PARTS ADDED TO DESIGN:

@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I1@CNCONNECTOR.CON38AB(CHIPS) CON38AB-UEC5-019-1-H-D-RA-1-A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I2@CNCONNECTOR.CON38AB(CHIPS) CON38AB-UEC5-019-1-H-D-RA-1-A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I3@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I4@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I5@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I6@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I7@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I8@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I9@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I10@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I11@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I12@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I16@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I17@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I18@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I19@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I20@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I21@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I22@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I24@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I25@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I26@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1210-100UF_20%_X5A (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I35@CNPASSIVE.PT100(CHIPS) PT100-P0K1.1206.2P.B (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I44@CNPASSIVE.PT100(CHIPS) PT100-P0K1.1206.2P.B (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I45@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1206-220UF,6.3V (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I46@CNPASSIVE.CAPCERSMDCL2(CHIPS) CAPCERSMDCL2_1206-220UF,6.3V (0)
@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PAGE1_I48@CNPASSIVE.TP(CHIPS) TP_SMD-2X2MM (0)

END LOGICAL CHANGES LIST


PHYSICAL CHANGES LIST

PHYSICAL PARTS ADDED TO DESIGN:

TP1	TP_SMD-2X2MM
C22	CAPCERSMDCL2_1206-220UF,6.3V
C21	CAPCERSMDCL2_1206-220UF,6.3V
R1	PT100-P0K1.1206.2P.B
R2	PT100-P0K1.1206.2P.B
C11	CAPCERSMDCL2_1210-100UF_20%_X5A
C12	CAPCERSMDCL2_1210-100UF_20%_X5A
C13	CAPCERSMDCL2_1210-100UF_20%_X5A
C14	CAPCERSMDCL2_1210-100UF_20%_X5A
C15	CAPCERSMDCL2_1210-100UF_20%_X5A
C16	CAPCERSMDCL2_1210-100UF_20%_X5A
C17	CAPCERSMDCL2_1210-100UF_20%_X5A
C18	CAPCERSMDCL2_1210-100UF_20%_X5A
C19	CAPCERSMDCL2_1210-100UF_20%_X5A
C20	CAPCERSMDCL2_1210-100UF_20%_X5A
C10	CAPCERSMDCL2_1210-100UF_20%_X5A
C9	CAPCERSMDCL2_1210-100UF_20%_X5A
C8	CAPCERSMDCL2_1210-100UF_20%_X5A
C7	CAPCERSMDCL2_1210-100UF_20%_X5A
C6	CAPCERSMDCL2_1210-100UF_20%_X5A
C5	CAPCERSMDCL2_1210-100UF_20%_X5A
C4	CAPCERSMDCL2_1210-100UF_20%_X5A
C3	CAPCERSMDCL2_1210-100UF_20%_X5A
C2	CAPCERSMDCL2_1210-100UF_20%_X5A
C1	CAPCERSMDCL2_1210-100UF_20%_X5A
J2	CON38AB-UEC5-019-1-H-D-RA-1-A
J1	CON38AB-UEC5-019-1-H-D-RA-1-A

PHYSICAL PARTS DELETED FROM DESIGN:


END PHYSICAL CHANGES LIST


NET CHANGES LIST

LOGICAL NET DELETIONS:


LOGICAL NET ADDITIONS:

NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):DGND' 'DGND'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):DVDD' 'DVDD'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):AGND' 'AGND'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):AVDD' 'AVDD'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PT100-A1-N' 'PT100-A1-N'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PT100-A1-P' 'PT100-A1-P'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PT100-D1-N' 'PT100-D1-N'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):PT100-D1-P' 'PT100-D1-P'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):VBB' 'VBB'	{ADDED}
NET_NAME '@ALPIDE_PWR_EXTENSION_V1_2_LIB.TOP(SCH_1):STAVE_GND' 'STAVE_GND'	{ADDED}

END NET CHANGES LIST
