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This section describes synthesis use Xilinx's XST synthesis tool, followed by Place & Route in ISE. If you are using a third party synthesis tool (such as Synopsys Synplify, Mentor Precision), follow those instructions instead.
ise &
Product Category General Purpose (or leave at All) Family Spartan3E Device XC3S500E Package FG320 Speed -4 Synthesis Tool XST (VHDL/Verilog) Simulator ModelSimSE VHDL (or ISIM if you used ISIM) Preferred Language VHDL
The next step is Place &Route. At the moment, the tool does not know which pins should be used on the target hardware. The pin locations are supplied in a user constraints file (UCF).
After a while, a green tick should appear. If it doesn't consult your course leader.
Click here for instructions to download the design.
synplify_pro&
Xilinx Spartan 3E XC3S500E FG320 -4
Done!
You can quit the tool.
To Place and Route and download the design, go to Place and Route
Product Category General Purpose (or leave at All) Family Spartan3E Device XC3S500E Package FG320 Speed -4
Now test if your downloaded design is working!
The 4 inputs are on slide/DIP switches SW0, SW1, SW2, SW3 at the lower right of the board. The 4 outputs are on the LEDs LD0, LD1, LD2, LD3. The pin numbers are printed on the board, so you can relate them back to the VHDL ports by looking in the spartan3E.ucf file.