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When you launch the Vivado Logic Simulator from the Vivado IDE - either interactively or by running our do_VivadoXsim.tcl script - Vivado creates a simulation run directory. For example, in a project named 'ex10sim' the run directory for behavioral simulation would be ex10sim/ex10sim.sim/sim_1/behav/. If your VHDL testbench creates or uses a text file without specifying the file's location then the location will be this run directory. The problem with this is that when you run another simulation Vivado may delete this run directory along with any text file you have written there. Therefore it is better to specifiy a path outside the project for any text file that you read or write, for example
file F: TEXT open WRITE_MODE is "../../../../counter.txt";
If you write a second testbench architecture for part 2 of the exercise the Vivado Logic Simulator will use that second architecture, even if you specifiy the first architecture as the top-level in the Vivado IDE. If you wanted to simulate the first testbench architecture again you could copy it into a separate VHDL file; if you do, remember to edit do_VivadoXsim.tcl to point to the file you want to simulate.
Alternatively, you could use an advanced VHDL feature: configurations. Add two configuration declarations to the end of counter_tb.vhd. The example assumes that 'part1' and 'part2' are the names of the two testbench architectures:
entity Counter_TB is end; architecture Part1 of Counter_TB is ... end architecture Part1; architecture Part2 of Counter_TB is ... end architecture Part2; configuration cfg_part1 of counter_tb is -- 'cfg_part1' configures entity 'counter_tb' ... for part1 -- ... to use architecture 'part1' end for; end configuration; configuration cfg_part2 of counter_tb is -- 'cfg_part2' configures entity 'counter_tb' ... for part2 -- ... to use architecture 'part2' end for; end configuration;
Modify do_VivadoXsim.tcl to set the simulation top-level to the name of the configuration you want to simulate:
set sim_top Cfg_part1
and run simulation as usual.