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Xilinx XSim (Vivado)

Getting Started

First, set up a new RTL project in Vivado in the ex02\simulate directory. You don't need a constraints (XDC) file. If you can remember the basics of creating a project click here; otherwise work through the following steps.

  1. Start Xilinx Vivado as follows
    • (Windows) Start the Vivado tool from the Windows Start menu or a desktop icon.
    • (Linux) Type this command in a terminal window:
      vivado &
  2. Create a new project:
    • Select menu File > New Project...
    • The Create a New Vivado Project dialog appears: Click Next
    • Set the following details
      Project Name            ex02sim	
      Location                browse to the ex02\simulate directory	
      
    • Leave Create project subdirectory checked
    • Click Next
  3. In the Project Type dialog:
    • Select RTL Project
    • Click Next
  4. In the Add Sources dialog:
    • Select the Target/Simulation languages: to VHDL
    • Click the green cross then "Add Files..."
    • In the Add Source Files dialog, browse to ex02\source
    • Highlight both mux4.vhd and mux4_tb.vhd, and Click OK
    • Make sure Copy Sources into project is NOT checked
    • Vivado will attempt to identify which sources are for Simulation, and which are for both Simulation & Synthesis. Check the settings it has chosen in the column HDL Source For – and make sure the testbench (mux4_tb.vhd) is set to Simulation only.
    • Click Next
  5. The Add Existing IP (optional) dialog appears
    • Click Next
  6. In the Add Constraints (optional) dialog, you can add a constraint file. For this simulation tour we will not add any constraints.
    • Click Next
  7. Select the default part - click the green Board icon
    Board        Zedboard Development and Evaluation board
    
  8. The New Project Summary appears
    • Assuming everything is OK, Click Finish

Setting up Simulation

  1. Make sure you are ready for simulation
    • In the Vivado IDE, there is a pane at the left labeled Flow Navigator. Click on Simulation Settings
    • In the Project Settings for Simulation, set the Target Simulator: to Vivado Simulator
    • The Simulation top module name: should be set to mux4_tb
    • (At this stage, you can ignore warnings that this doesn' exist.)
    • In the Elaboration tab at the bottom of the window, make sure
      xsim.elaborate.rangecheck
      is checked.
    • Set the
      xsim.elaborate.debug_level
      option as all
  2. You can now set other simulation settings
    • Click on the Simulation tab. In this tab you may set the Simulation Run Time. It defaults to 1000ns. Set it to the word all (meaning "run until there is nothing more to do"). Click OK.

Fixing Errors

The project is now set up and you are ready to start fixing the errors in the VHDL files.

  1. Fix errors and debug
  2. To run simulation
    • In the Flow Navigator, click Run Simulation.
    • In the dialog that appears, select Run Behavioral Simulation
  3. At this point you may receive an error message dialog.
    • Click OK to remove the dialog.
    • In the Messages tab you will see further errors. You may need to look in the Tcl console for details of the errors. Look for lines that start with the text "ERROR:"
    • Repeat editing and saving until you have removed the most recent Errors or Critical Warnings (note that old Errors may remain visible in the Messages pane as well, so make sure you scroll to the bottom).
    • Attempt to run simlation again. If you are in the Tcl console you could use the up-arrow key to retrieve the last command (launch_simulation) and press Enter. Or you could click on Run Simulation in the Flow Navigator.
    • Continue until simulation starts sucessfully.

Running Simulation

  1. Once the design has been successfully loaded, the Xilinx XSim GUI launches.
  2. Once the Xilinx XSim GUI has loaded, it will immediately run the simulation, and the top level waveforms are added to the waveform window.
    • In the wave window you should see a waveform for each of the signals at the top level of your simulation. To see the full waveforms, right click over the waveforms and select menu Full View, or click the Zoom Fit button to the left of the waveforms.
  3. By now you will be able to see a number of panes within the GUI:
    • A pane labelled Scopes containing a browser for all the instances and processes in your simulation
    • A pane labelled Objects, containing a browser for the objects visible in that part of the design (i.e. what it shows depends on what you have highlighted in the Scopes pane).
    • A waveform display
    • Below the waveform display, a console. You can read messages and type commands in the console.
  4. The simulator’s Objects pane is linked to the hierarchy in the Scopes pane of the main window:
    • Select different levels of the hierarchy of the design in the Scopes pane and notice what is happening to the contents of the Objects window.
    • (You should see the signals etc. for the corresponding level of the hierarchy.)
  5. The default setting of Xilinx XSim after launch is to add top level signals to the waveform window. You can add other signals as well
    • In the Scopes pane, browse to the next level of hierarchy and highlight it by clicking on it. Now click on the highlighted instance using the right mouse button, and select Add To Wave Window.
  6. You may find it helpful to undock the waveform window from the main window:
    • Right-click on the waveform tab and select menu Float, or select the Float Window button
    • At this point, you can see that new waveforms do not appear – you must Restart simulation. Note: you can restart simulation from Xilinx XSim, you do not have to go back to Vivado and re-launch the simulation.
  7. You will now restart simulation, and run it to the end.
    • Select menu Run>Restart... or click the blue “rewind” button.
    • Select menu Run>Run All or click the blue “play” button.
  8. In the wave window you should see a waveform for each of the signals you added earlier. The buttons on the wave window toolbar (to the left of the waveforms) provide a number of options for zooming the waveforms.
    • To view the full simulation, right-click over the waveforms and select menu Full View. (Alternatively, click on the Zoom Fit button.) The waveforms will be sized to fit the window.
  9. If you want to zoom in to part of the waveform display:
    • Hold down the left mouse button and drag across a region of the waveforms. A red shaded region appears.
    • Let go of the mouse button, and you will have zoomed in to that region of the waveform window.
  10. Xilinx XSim also support mouse strokes.
    • Hold down the left mouse button, and try dragging over the waveforms – bottom right to top left does Zoom Fit; bottom left to top right does Zoom Out; top right to bottom left does Zoom In; and top left to bottom right does the shaded red zoom described above.

Debugging

You will now learn how to use some of the debugging facilities of the simulator.

  1. At any time, the simulation can be restarted from time zero:
    • In the Vivado menus, select menu Run>Restart
  2. The following steps will take you through a typical debugging sequence. This might include running the simulation for a specified time, stepping through the source code one statement at a time, and using break points.
  3. First run the simulator for a short time:
    • In the Tcl Console pane, type the command:
      run 15 ns
  4. When the simulator halts at time 15 ns, notice that the waveforms for the selected signals are shown up to that time.
  5. The Step button (a yellow arrow pointing into a blue code listing) can be used to single-step the simulator through your VHDL or Verilog source code statement by statement.
    • Click on the Step button a few times, and watch what happens in the windows.
  6. An alternative method of debugging a design involves the use of break points. A break point can be set on any executable statement, although sometimes the compiler may make optimizations that mean some statements cannot have break points set on them.
  7. To set a break point,
    • After single stepping, you should have your testbench source code available on a tab, together with a tab which shows the wave window – click on the testbench source code tab so you can see the source code.
    • In the source code, click on a line so that it is highlighted
    • To the left, click on a red ring to set a breakpoint.
    • If there is no red ring, then a breakpoint may not be set on that line.
    • A solid red circle will appear against the line number.
    • Now continue simulation by clicking on the Run All button.
    • Notice that the simulator now stops when it reaches the line with the breakpoint.
  8. Clicking on the solid red circle disables the breakpoint. Clicking at the same position (just to the right of the line number) again enables it (the solid red circle is displayed again).
    • Click on the solid red circle to disable the breakpoint.
    • Restart the simulation.
    • Run the simulation again and demonstrate that the breakpoint is now disabled.
  9. Additional breakpoints can be set in the same way.

Re-launching Simulation

If you edit a source file while the simulator is running, then you need to re-compile the file. One way to do this is to quit the simulator, then launch it again. However there is a faster way.

  1. Make a change to one of the source files.
    • Click on the Sources tab at the left of the simulator view – this hides the Scopes, and shows the source files
    • Double-click on one of the files to open it in the editor. Make a small change and save it.
  2. To relaunch the simulator (including re-compiling the source code):
    • Click the Relaunch Simulation button (a circling blue arrow), or use the menu Run>Relaunch Simulation.
    • You may be prompted with an “Are you sure...” dialog – if so, click OK.
    • The simulation will re-launch.
  3. You will notice that any waveform changes you have made may have been lost. To preserve waveform changes, you can save a waveform configuration (.cfg) file.
    • To the left of the waveform window, there is a button Save Waveform Configuration – click it.
    • Accept the default filename and click Save
    • If prompted to add the waveform configuration file to the project, click Yes
    • Now relaunch simulation and your waveform selections are restored.

Exiting

When you have finished, close Vivado by selecting File > Exit.

If you added extra signals to the waveform window, but didn't save them in a waveform configuration file, you may now be prompted to save them and to add the resulting waveform configuration file to the project.

Done!