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ELECTRONICS: OLD ADC BLOOM


Below is a plot showing the FWHM of the ADC signal versus signal height. During the test, we operated at low beam rates and min-i, thus on the extreme left side of this plot, and the widths of our pedestals and signals were correspondingly large, as could be seen on the previous slide.
In the intended behavior is indicated by the dotted horizontal line: widths should be a few channels, and independent of the mean signal value. In the redesigned version of this custom chip, this problem has been solved.